The present invention relates to a semiconductor device and its manufacturing method, and more particularly to a technique that can be effectively applied to the prevention of chipping of semiconductor chips.
In a semiconductor device of a conventional chip size, a semiconductor chip has a configuration mainly consisting of a semiconductor substrate and, formed over the circuit formation surface which is the outer of the inner and outer surfaces of this semiconductor substrate, a multi-layered wiring layer formed by stacking a plurality each of insulating layers and wiring layers, and a surface protecting film so formed as to cover this multi-layered wiring layer (see Patent Reference 1 for example).    Patent Reference 1: Japanese Unexamined Patent Publication No. 2000-294607 (FIG. 3)